16. HP instruction set

This chapter summarizes the instruction set without going into deep details. If you want more details, consult the NEWT manual which describes the enhanced NEWT architecture. Instruction wise it is almost identical to the original Nut.

16.1. Non-local jump instructions

These instructions will jump to an absolute address within the 64K memory space. They are used for calling entries in the mainframe ROM and some fixed page located ROMs, typically in the address range 0000–7FFF.

There are in reality 4 instructions and everyone will examine the carry to decide whether the jump should be taken or not. While gosub and gsubnc are the same instruction, the mnemonics serve two different purposes.

1. Unconditional non-local jumps using gosub or golong . The previous instruction should leave the carry flag cleared, and most instructions behave like this,

2. Test instruction followed by a non-local jump. In this case you want to use a variant that reflect that you are making use of the status of the carry flag, like gsubnc (even though it is the same instruction as gosub).

Table 16.1 Non-local jumps

Mnemonic	Operand	Description
gosub	expr	Absolute jump to subroutine
gsubnc	expr	Synonym for gosub
gsubc	expr	Absolute jump to subroutine on carry set
golong	expr	Absolute jump
golnc	expr	Synonym for golong
golc	expr	Absolute jump on carry set

16.2. Local branches

Local branch instructions are position independent branches. They are rather short distance, -63 to 64 words.

There are in reality 2 instructions, both will examine the carry to decide whether the jump should be taken or not.

The goto instruction is intended to be used when you make a unconditional jump knowing that the carry will always be clear.

Table 16.2 Local jumps

Mnemonic	Operand	Description
goto	expr	Short branch (on carry clear)
gonc	expr	Synonym for goto
goc	expr	Short branch on carry set

16.3. Page relocatable jumps

These instructions take 3 words and are made up by a 2-word non-local gosub to a mainframe routine that reads the third word and uses that as part of the destination. They work inside a 4K ROM page.

As they are implemented with the gosub instruction, you need to ensure that the carry flag is not set when executing the instruction, otherwise the gosub will be skipped and you end up executing the third (page offset) word as an instruction, which is probably not what you intended.

The linker will pick the appropriate mainframe routine to use depending on the jump location and its destination.

Table 16.3 Page relative jumps

Mnemonic	Operand	Description
gsbp	expr	4K page relocatable jump to subroutine
gsb41c	expr	Synonym for gsbp
golp	expr	4K page relocatable jump
gol41c	expr	Synonym for golp

Note

The gsbsam and golsam that exist in the original HP instruction set are currently not supported. They are limited to have the call and destination in the same 1024-word sub-page, while the more general routines can reach anywhere in the 4K page. The linker will choose the 1024-word variant whenever possible, but it will not do active section placement to ensure it happens.

The benefits of the 1024-word variants are that it does not temporarily use a stack level (limiting it to three levels of the four available) and that it runs slightly faster.

If you want to ensure that the 1024-word variant is used, simply use a specific section name for each such 1024-word area and limit the address range accordingly in the linker description. Then use that section name for code that belongs together in this respect. This way you can ensure that the 1024-word variants are used when it matters, but still give the linker freedom to place things when it does not matter.

16.4. Other jump and subroutine instructions

Mnemonic	Description
gotoc	Jump to address in C[6:3]
stk=c	Push C[6:3] on stack
c=stk	Pop stack to C[6:3]
spopnd	Pop stack and discard value
rtn	Return from subroutine
rtnnc	Return from subroutine if carry clear
rtnc	Return from subroutine if carry set

16.5. Pointer instructions

There are two pointers, P and Q. They are used to describe which part of a 56-bit register to operate on, but they can also be used as counters. One pointer register is active at any given time.

Table 16.4 Pointer instructions

Mnemonic	Operand	Description
selp		Select pointer P
selq		Select pointer Q
?p=q		Test if P and Q pointers are equal
decpt		Decrement current pointer
incpt		Increment current pointer
pt=	expr	Set current pointer
?pt=	expr	Test if current pointer equals value

16.6. Arithmetic instructions

Arithmetic instructions take a field argument describing which part of the register to operate on.

Table 16.5 Fields

Field	Description
pt	At pointer
x	Exponent
wpt	Word up to pointer
w	Word
pq	Between pointers
xs	Exponent sign
m	Mantissa
s	Sign of mantissa

Table 16.6 Arithmetic instructions

Mnemonic	Operand	Description
a=0	field	Clear (part of) A register
b=0	field	Clear (part of) B register
c=0	field	Clear (part of) C register
abex	field	Exchange (part of) A and B registers
b=a	field	Move (part of) A to B register
acex	field	Exchange (part of) A and C registers
c=b	field	Move (part of) B to C register
bcex	field	Exchange (part of) B and C registers
a=c	field	Move (part of) C to A register
a=a+b	field	Add (part of) register
a=a+c	field	Add (part of) register
a=a+1	field	Increment (part of) register
a=a-b	field	Subtract (part of) register
a=a-1	field	Decrement (part of) register
a=a-c	field	Subtract (part of) register
c=c+c	field	Bit shift left (part of) C register
c=a+c	field	Add (part of) register
c=c+a	field	Synonym for previous instruction
c=c+1	field	Increment (part of) register
c=a-c	field	Subtract (part of) register
c=c-1	field	Decrement (part of) register
c=-c	field	One complement (part of ) register
c=-c-1	field	Two complement (part of) register
?a#0	field	Test if (part of) A is non-zero
?b#0	field	Test if (part of) B is non-zero
?c#0	field	Test if (part of) C is non-zero
?a<c	field	Test if (part of) A is less than C
?a<b	field	Test if (part of) A is less than B
?a#c	field*	Test if (part of) A is not equal to C
asr	field*	Nibble shift (part of) A right
bsr	field*	Nibble shift (part of) B right
csr	field*	Nibble shift (part of) C right
asl	field	Nibble shift (part of) A left

The following two word pseudo instructions are supported:

Mnemonic	Operand	Description
b=c	field	Move (part of) C to B register
c=a	field	Move (part of) A to C register
a=b	field	Move (part of) B to A register

The following synonyms are supported:

Mnemonic	Operand	Description
cbex	field	Exchange (part of) B and C registers
baex	field	Exchange (part of) A and B registers
caex	field	Exchange (part of) A and C registers

16.7. Flag instructions

Mnemonic	Operand	Description
st=0	expr	Clear flag
sN=0		Clear flag, replace N with flag number 0 to 13
st=1	expr	Set flag
sN=1		Set flag, replace N with flag number 0 to 13
?st=1	expr	Test flag
st=1?	expr	Test flag
?sN=1		Test flag, replace N with flag number 0 to 13
clrst		Clear flags 0–7
st=c		Copy C[0:1] to flags 0–7
c=st		Copy flags 0–7 to C[0:1]
cstex		Exchange C[0:1] with flags 0–7

16.8. RAM memory instructions

RAM comes in units of 16 registers. You select a register to operate on and then read or write that particular register. It is also possible to access registers within the same 16 register unit, 1 but in practise, this is only useful for the very first 16 registers.

Table 16.7 RAM memory instructions

Mnemonic	Operand	Description
dadd=c		Select RAM memory register location
data=c		Write C register to selected RAM location
c=data		Read from selected RAM location to C register
regn=c	register	Write C register to given RAM register
c=regn	register	Read given RAM register to C register

Table 16.8 RAM registers

Register number	Alternative
0	T
1	Z
2	Y
3	X
4	L
5	M
6	N
7	O
8	P
9	Q
10	+
10	|-
11	a
12	b
13	c
14	d
15	e

Footnotes

1

Reading register 0 is special because it does not exist. Instead that opcode is used for c=data, read the current selected register.

16.9. ROM memory instructions

Mnemonic	Description
cxisa	Read word from ROM memory
wmldl	Write to simulated MLDL ROM
enrom1	Enable ROM bank 1
enrom2	Enable ROM bank 2
enrom3	Enable ROM bank 3
enrom4	Enable ROM bank 4

16.10. Keyboard instructions

Mnemonic	Description
c=keys	Read keycode to C[4:3]
gokeys	Put keycode into low part of PC
rstkb	Reset keyboard
chkkb	Test if key is down

16.11. Miscellaneous instructions

Mnemonic	Operand	Description
nop		No operation
powoff		Stop CPU
lc	expr	Load 4-bit value to C register at pointer selected nibble
ldi	expr	Load 10-bits immediate to C.X
selpf	expr	Select smart peripheral
?flg=1	expr	Test if I/O flag is pulled
?fN=1	expr	Test if I/O flag is pulled, replace N with flag number 0 to 13
rcr	expr	Rotate C register right, both positive and negative values are accepted
sethex		Set binary arithmetic mode
setdec		Set BCD arithmetic mode
c=n		Move N to C register
n=c		Move C to N register
cnex		Exchange C and N registers
c=m		Move M to C register
m=c		Move C to M register
cmex		Exchange C and M registers
c=g		Move G to C register at pointer position
g=c		Move C to G register at pointer position
cgex		Exchange C and G registers at pointer position
f=sb		Move status byte to tone register
sb=f		Move tone register to status byte
fexsb		Exchange tone register and status byte
?lld		Low level detect, check for low battery
c=cora		Bitwise or A to C register
c=c&a		Bitwise and A to C register
clrabc		Clear A, B and C registers
pfad=c		Select peripheral

The following synonyms are supported:

Mnemonic	Operand	Description
ncex		Exchange C and N registers
mcex		Exchange C and M registers

16.12. LCD instructions

I/O instructions like the ones for the LCD are shared with the RAM access instructions. The assembler provides synonym instructions for the LCD as follows:

Table 16.9 LCD instructions

Mnemonic	Description
disoff	Turn display off
distog	Toggle display on or off
srlda	Shift right long, load A
srldb	Shift right long, load B
srldc	Shift right long, load C
srldab	Shift right long, load AB
srlabc	Shift right long, load ABC
slldab	Shift left long, load AB
sllabc	Shift left long, load ABC
srsda	Shift right short, load A
srsdb	Shift right short, load B
srsdc	Shift right short, load C
slsda	Shift left short, load A
slsdb	Shift left short, load B
srsdab	Shift right short, load AB
slsdab	Shift left short, load AB
srsabc	Shift right short, load ABC
slsabc	Shift left short, load ABC
wrten	Write annunciators
fllda	Read left long A
flldb	Read left long B
flldc	Read left long C
flldab	Read left long AB
fllabc	Read left long ABC
readen	Read annunciators
frsda	Read right short A
frsdb	Read right short B
frsdc	Read right short C
flsda	Read left short A
flsdb	Read left short B
flsdc	Read left short C
frsdab	Read right short AB
flsdab	Read left short AB
rabcr	Read right short ABC
rabcl	Read left short ABC
frsabc	Read right short ABC
flsabc	Read left short ABC

Note

The register names A, B and C used here have nothing to do with the CPU registers with the same name.

16.13. Timer chip instructions

Mnemonic	Description
wrtime	Write time
wdtime	Write time and hold
wralm	Write alarm
wrsts	Write status
wrscr	Write scratch
wsint	Write interval timer
stpint	Stop interval timer
dswkup	Disable test mode
enwkup	Enable test mode
dsalm	Disable alarm
enalm	Enable alarm
stopc	Stop clock
startc	Start clock
pt=b	Select timer B
pt=a	Select timer A
rdtime	Read clock
rctime	Read clock and correct
rdalm	Read alarm
rdsts	Read status
rdscr	Read scratch
rdint	Read interval timer
alarm?	Test if alarm
fatl?	Test timer access failure

16.14. Card reader instructions

The card reader (peripheral 0xFC). PPC calculator journal V11N6 page 18–20 has an article about the programming internals of the card reader.

Table 16.10 Card reader instructions

Mnemonic	Description
stwrit	Start write cycle
enwrit	End write cycle
stread	Start read cycle
enread	End read cycle
crdwpf	Test write protect
crdohf	Fetch card over head flag
crdinf	Test if card inserted
tstbuf	Test card read/write buffer
trpcrd	Set card trip flag
tclcrd	Test and clear card trip flag
crdflg	Fetch card reader external flag
crdr?	Set carry on card reader flag (peripheral flag 1)

16.15. Wand instructions

Table 16.11 Wand instructions

Mnemonic	Description
wndb?	Set carry when data in Wand buffer (peripheral flag 2)

16.16. HP-IL instructions

Mnemonic	Operand	Description
orav?		Test output register available
frav?		Test if frame is available
ifcr?		Test if IFC command received
frns?		Test frame received no as sent
srqr?		Test for service request received
hpil=c	IL-register	Write to HP-IL register n where IL register is 0-7
c=hpil	IL-register	Read from HP-IL register n where n is 0-7
hpl=c	IL-register	Write 8-bit expr to HP-IL register n where n is 0-7
ch=	expr	Specifies char used in hpl=c

16.17. Peripheral instructions

Mnemonic	Operand	Description
?pfset	0-15	Set carry if peripheral flag N is set
printc		Add C[1:0] to print buffer
rdptrn		Read status
rdptrr
rtncpu

16.18. Hepax instructions

Mnemonic	Operand	Description
romblk		Move ROM block
wptog		Toggle write protection

16.19. NEWT specific instructions

NEWT specific instructions are recognized if you specify the command line option --core newt.

Mnemonic	Operand	Description
wcmd		Write command